MobilEye chooses Imagenation’s MIPS I6500 architecture

25 October, 2016

Israeli MobilEye the first major customer to choose British Imagination’s MIPS I6500 architecture. The architecture will be used in Mobileye’s next generation processors

Israeli MobilEye the first major customer to choose British Imagination’s MIPS I6500 architecture. The architecture will be used in Mobileye’s next generation processors

mobileye-ceo
MobilEye founder and CTO Amnon             Shasua

British imagination announced the new MIPS multi-threaded, multi core, multi-cluster CPU design I6500, designated for applications such as advanced driver assistance systems (ADAS) and autonomous vehicles, networking, drones, industrial automation, security, video analytics, machine learning, and others which increasingly rely on heterogeneous computing.

Heterogeneous computing has become a cornerstone of embedded and high performance systems. The terms refers to the combination of CPU, GPU and DSP processors, as well as various hardware accelerators, to handle particular tasks simultaneously. The I6500 provides a highly scalable solution which can coherently implement optimized configurations of CPU cores within a cluster (‘Heterogeneous Inside’) as well as a variety of configurations of CPU clusters and GPU or accelerator clusters on a chip depending on the requirements of the system (‘Heterogeneous Outside’).

To meet power consumption and performance targets, the EyeQ5 will be designed in advanced 10nm or below FinFET technology node by STMicroelectronics, with which MobilEye has a long established cooperation. The Processor will feature eight multithreaded CPU cores coupled with eighteen cores of Mobileye’s vision processors. Taken together, these enhancements will increase performance 8x times over the current 4th generation EyeQ4. The EyeQ5 will produce more than 12 Tera operations per second, while keeping power consumption below 5W, to maintain passive cooling at extraordinary performance. Engineering samples of EyeQ5 are expected to be available by first half of 2018.

Elchanan Rushinek, SVP engineering, Mobileye, said: “Imagination’s multi-threaded MIPS CPUs have helped us achieve performance increases of more than 6x with each successive generation of EyeQ SoCs. Now with the EyeQ5® we are looking at an 8x increase. The combination of Mobileye’s VPs and MIPS CPUs enables us to provide unrivalled computing power on a single processor while maintaining a very low power budget, and the hardware virtualization capability in the I6500 CPUs provides a solid foundation for an open software platform with multiple operating systems.”

Flexible processing infrastructure

The new MIPS I6500 architecture is the fruit of the redesign of the MIPS architecture acquired by British imagination some four years ago. In its new version, the architecture supports the creation of processing clusters including hundreds of CPU processors.

EyeQ5 Block Diagram

EyeQ5 Block Diagram

The new architecture allows the user to customize the processing resources using to “lanes” -Heterogeneous Inside which enables designers to optimize power consumption in a single cluster, with the ability to configure each CPU with different combinations of threads, different cache sizes, different frequencies, and even different voltage levels. The second “lane”, Heterogeneous Outside  makes use of latest MIPS Coherence Manager with an AMBAACE interface to popular ACE coherent fabric solutions such as those from Arteris and Netspeed lets designers mix on a chip configurations of processing clusters – including PowerVR GPUs or other accelerators – for high system efficiency.

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Posted in: Autonomous Car , Semiconductors

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